Principal ASIC Design Engineer - Terawave Verified today

About TeraWave

Blue Origin is pioneering space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

The Role

You will be critical to ensuring RFIC and ASIC designs culminate in thoroughly designed and validated cutting-edge integrated circuits. You will drive end-to-end design and verification methodologies, from writing requirements and specifications to post-silicon bring-up.

Design and Verification Responsibilities

• Verilog and SystemVerilog design of complex SoCs
• CDC, RDC, LINT verification techniques
• Write requirements, specifications and test plans
• Optimize performance while keeping power low
• Clock gating (dynamic and static)
• Multi-voltage SoC front-end design
• Formal verification
• Functional coverage definition and collection
• Module and complex subsystem verification
• Complex SoC verification
• Co-simulation with software and integration of software build tool flow with simulation
• Gate simulation
• External IP integration
• ARM CPU single and multi-core integration with bus fabric, GIC, cache, MMU, secure boot
• AXI bus complex integration
• High-performance DMA
• NOC integration
• DDR, PCIe, Ethernet, SPI integration
• High-speed SerDes integration
• DSP structures (FIR, Cordic, FFT/IFFT, MAC, circular buffers, analog-digital interface)
• Modem design using state-of-the-art DSP, coding, framing (PHY and MAC)
• Sequenced and time-bound data movement in DSP structures (time slots, timestamps)
• SoC top-level integration using models for analog macros
• Verification using golden reference models in Matlab, SystemC or C
• Code coverage analysis
• Timing constraints
• Support back-end teams during DFT, LEC, floorplan, STA

Post-Silicon and FPGA

• Post-silicon bring-up
• ASIC to and from FPGA flow

Minimum Qualifications

• BS or MS in Electrical Engineering or related technical discipline
• 10+ years of experience
• Deep working knowledge and hands-on experience in innovative verification flows

Location

This role is based on-site in San Diego, CA; Bay Area, CA; Austin, TX; or Kent, WA.

Compensation

Base pay range for CA applicants: $269,175.00 to $376,843.95. WA applicants: $269,175.00 to $376,843.95. Other site ranges may differ.

US Person Requirement

Applicants for employment at Blue Origin must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.