Senior ASIC Design Verification Engineer - Terawave Verified today

About TeraWave

Blue Origin is building TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO).

The Role

You will lead verification of complex digital subsystems for next-generation satellite communication ASICs. This role requires strong expertise in advanced verification methodologies, architecture understanding, and multi-functional collaboration to ensure robust, high-quality silicon.

Responsibilities

• Lead verification planning and execution for complex blocks or subsystems.
• Develop sophisticated UVM environments, reference models, scoreboards, protocol monitors, and assertions.
• Translate architecture and design specifications into comprehensive verification strategies and measurable coverage goals.
• Drive functional coverage closure, regression health, and verification signoff readiness.
• Identify verification gaps, corner cases, and high-risk scenarios early in the development cycle.
• Collaborate closely with design, systems, DFT, firmware, and physical design teams.
• Review testbench architecture, stimulus quality, and debug methodologies for technical excellence.
• Mentor junior engineers in verification standard processes.
• Support bring-up, emulation, prototyping, and post-silicon debug activities as needed.

Minimum Qualifications

• BS or MS in Electrical Engineering, Computer Engineering, or related field.
• 8 or more years of ASIC/SoC verification experience.
• Deep hands-on expertise in SystemVerilog and UVM.
• Strong understanding of verification planning, assertions, and coverage closure.
• Experience verifying complex digital control and datapath logic.
• Proven debugging capability across RTL, testbench, and system interactions.
• Ability to work effectively across multidisciplinary engineering teams.

Preferred Qualifications

• Background in space-based communications, wireless communications, or modem/baseband hardware.
• Experience verifying LDPC/BCH/FEC blocks, framing engines, beamforming logic, or DSP pipelines.
• Familiarity with formal verification tools and methodologies.
• Experience with low-power verification, CDC/RDC verification, or reset-domain behavior.
• Knowledge of high-speed interface verification and hardware/software interactions.

Compensation

Base pay range for CA and WA applicants: $230,398.00 to $322,556.85. Other site ranges may differ.

Requirements

Applicants must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Benefits

• Medical, dental, vision, basic and supplemental life insurance.
• Paid parental leave, short and long-term disability.
• 401(k) with company match up to 5%.
• Education Support Program.
• Stock options for all regular employees working at least 20 hours per week.
• Paid time off: up to four weeks per year based on weekly scheduled hours, plus up to 14 company-paid holidays.
• Performance-based bonuses and benefits dependent on role type and job level.