RFIC Layout Designer (RFIC Engineering) Verified today
RFIC Layout Designer (RFIC Engineering)
SpaceX is developing Starlink, the world's largest satellite constellation providing broadband internet to millions globally. We design, build, test and operate thousands of satellites, consumer receivers, and the software connecting them. We are seeking engineers to work on multiple silicon projects driving higher integration, lower power, and mixed-signal architectures for space and ground infrastructure.
In this role, you will lead the layout discipline for full-chip custom analog and RFIC designs. You will work with RFIC and mixed-signal designers, IC leads, and cross-functional teams including systems architecture, ASIC design, firmware, verification, and manufacturing.
Responsibilities
- Work with circuit designers and chip leads to determine chip floorplan, including power and ground distribution strategy and pad locations with packaging engineers
- Estimate layout schedule accurately and identify areas of complexity for early investigation
- Perform layout of custom RF and analog circuit blocks with attention to matching and parasitic capacitance minimization
- Perform design rule checking, electrical rule checking and layout versus schematic checks, then resolve errors
- Perform top-level layout integration with electrostatic discharge structures and pad assembly; execute final tape-out including density fill, design for manufacturability checks, and GDS delivery to foundry
- Work with EDA suppliers to trial new tools and features
- Generate guides and demos showcasing improvements in layout technique
Required Qualifications
- Bachelor's degree in electrical or computer engineering plus 1+ years professional experience as IC layout designer, OR 3+ years professional experience with integrated circuit layout design
Preferred Skills and Experience
- Strong analog layout skills
- Experience with advanced node IC layouts (22nm, 16nm, 7nm, 5nm or below)
- Layout of circuits with frequencies up to 50GHz
- Layout of sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators and mixers
- Skill programming experience
- Shell scripting, Perl, Python or similar languages
- Revision control systems experience
- Circuit design experience
- Understanding of layout considerations for device matching, coupling and noise isolation
- Working knowledge of Linux
- Excellent oral and written communication skills
- Ability to work independently on challenging problems
Additional Requirements
- Must be willing to work extended hours and weekends as needed to meet critical milestones
Compensation
Pay Range:
Level 1: $115,000 - $155,000
Level 2: $130,000 - $185,000
Actual level and base salary determined on case-by-case basis based on job-related knowledge and skills, education, and experience.
Base salary is one part of total rewards. You may be eligible for long-term incentives in company stock or long-term cash awards, discretionary bonuses, and Employee Stock Purchase Plan discounts. Benefits include comprehensive medical, vision and dental coverage, 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various discounts and perks. You will accrue 3 weeks paid vacation and be eligible for 10 or more paid holidays per year. Paid sick leave accrues pursuant to Company policy.
ITAR Requirement
To conform to U.S. Government export regulations, applicant must be a U.S. citizen or national, U.S. lawful permanent resident (green card holder), Refugee under 8 U.S.C. Section 1157, or Asylee under 8 U.S.C. Section 1158, or be eligible to obtain required authorizations from the U.S. Department of State.